The present invention relates to the fabrication of semiconductor devices on a semiconductor on insulator (SOI) substrate, and more particularly, to the fabrication of semiconductor devices having multiple threshold voltages (VT) on an extremely thin SOI substrate.
Extremely thin SOI substrates (ETSOI), also known as fully depleted SOI (FDSOI), rely on an ultra-thin semiconductor (usually silicon) layer on a buried oxide layer. “Fully-depleted” means that the conducting channel of the transistor is depleted of charge by the time the transistor turns on which can only occur in SOI technologies because in bulk silicon there is an almost infinite source of charge available that cannot be depleted. The performance advantage of fully-depleted transistors comes from the fact that when there is no charge in the channel, the entire gate voltage is applied to create a conducting channel.
ETSOI is a viable device option for extending CMOS scaling. The device characteristics of ETSOI can be tuned by doping and/or applying back gate bias which enables device tuning and/or multiple threshold voltages (VT).